Semiconductor devices, such as, non-volatile memory circuits often include floating gate field effect transistors (FETs). For example, flash memory devices employ floating gate FETs which are arranged as a matrix of memory cells coupled together by word lines and bit lines. Each floating gate transistor generally includes a control gate, a floating gate, a drain, and a source. The word lines are coupled to the control gates of the transistors, and the bit lines are coupled to the drains of the transistors.
Floating gate FETs are generally bulk semiconductor-type devices in contrast to semiconductor-on-insulator-type devices, such as, silicon-on-insulator (SOI) devices. The FETs are disposed in a single plane on a top surface of a semiconductor substrate such as a silicon substrate.
In bulk semiconductor-type devices which have lateral floating gate FETs, the top surface of the substrate is doped to form source and drain regions, and a conductive layer is provided over a floating gate on the top surface of the semiconductor substrate between the source and drain regions to operate as the control gate. The number of layers of lateral floating gate FETs is limited to one layer (e.g., the top surface). Additionally, the anisotropic nature of the top surface of the silicon substrate due to the conductive layer limits the number of metal layers and insulative layers which can be provided over the lateral FETs.
Bulk semiconductor-type devices can be subject to some disadvantageous properties, such as, less than ideal subthreshold voltage slope during operation, high junction capacitance, and ineffective isolation. Additionally, bulk semiconductor-type devices often require epilayers, P-wells, or N-wells which require additional fabrication steps.
Semiconductor-on-insulator (SOI) (e.g., silicon-on-insulator) devices have significant advantages over bulk semiconductor-type devices, including near ideal subthreshold voltage slope, low junction capacitance, and effective isolation between devices. SOI-type devices generally completely surround a silicon or other semiconductor substrate with an insulator. Devices, such as, conventional FETs or other transistors, are disposed on the silicon by doping source and drain regions and by providing gate conductors between the source and drain regions. SOI devices provide significant advantages, including reduced chip size or increased chip density, because minimal device separation is needed due to the surrounding insulating layers. Additionally, SOI devices can operate at increased speeds due to reductions in parasitic capacitance.
Conventional SOI devices generally have a floating substrate (the substrate is often totally isolated by insulating layers). Accordingly, SOI devices are subject to floating substrate effects, including current and voltage kinks, thermal degradation, and large threshold voltage variations. SOI devices also can have some limited packing densities because they are limited in vertical integration. Generally, SOI devices are only comprised of a single SOI layer and do not include floating gate FETs for use in non-volatile memory applications such as flash memory.
Thus, there is a need for an SOI or bulk semiconductor device which has improved density and improved vertical integration. Further, there is a need for an SOI device which includes a floating gate FET which has increased operating speed. Further still, there is a need for a multilayer SOI or bulk semiconductor device which contains floating gate FETs.